1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, it relates to a semiconductor device which obtains high reverse voltage blocking ability by exposing P-N junction portions in mesa grooves and a method of manufacturing the same. Description of the Prior Art
FIG. 5 is a sectional view showing element structure of a conventional mesa thyristor which is described in "Introduction to Electronics 3, Magic Switch Thyristor" by Isao Shibazaki, issued on Dec. 14, 1985 from Seibundo Shinkosha, pp. 34-35. As shown in FIG. 5, a semiconductor wafer 1 is provided with a P.sub.E.sup.+ -type impurity region 4, an N.sub.B.sup.- -type impurity region 5, a P.sub.B.sup.+ -type impurity region 6 and an N.sub.E.sup.++ -type impurity region 7 by well-known impurity diffusion means. Signs "+" and "-" show high and low absolute values of impurity concentration respectively, and sign "++" shows extremely high impurity concentration. The semiconductor wafer 1 is further provided on both major surfaces with mesa grooves 2, which are formed by a chemical etching process. The mesa grooves 2 tend to be V-shaped or U-shaped in section in case of a generally employed semiconductor wafer having crystal orientation of &lt;1.1.1&gt;. Passivation films 3 of passivation material such as silicon rubber, lead or glass are provided on the inner surfaces of the mesa grooves 2, in order to prevent deterioration of the mesa groove surfaces.
Description is now made on operation referring to reverse voltage blocking ability of a thyristor element. FIG. 6 is a sectional view showing an essential part of a chip separated from the semiconductor wafer 1 after formation of the mesa grooves 2. When switches S1 and S2 are turned on and off respectively in FIG. 6, a P.sub.E.sup.+ -type region 4 and an N.sub.B.sup.- -type region 5 are forwardly biassed while the N.sub.B.sup.- -type region 5 and a P.sub.B.sup.+ -type region 6 are reversely biassed. The P.sub.B.sup.+ -type region 6 and an N.sub.E.sup.++ -type region 7 are forwardly biassed. As is well known in the art, a depletion layer 8 is generated in the boundary between the N.sub.B.sup.- -type region 5 and the P.sub.B.sup.+ -type region 6, to hold applied voltage. In a similar manner, when the switches S1 and S2 are turned off and on respectively, a depletion layer 9 is generated in the boundary between the N.sub.B.sup.- -type region 5 and the P.sub.E.sup.+ -type region 4, to prevent voltage in an AC circuit. Although the P.sub.B.sup.+ -type region 6 and the N.sub.E.sup.++ -type region 7 are reversely biassed to be generated a depletion layer in the boundary between the same, such a depletion layer is merely slightly generated since the said regions are of high impurity concentration, and hence no current preventing ability is provided.
FIG. 7 is a graph showing relation between bevel angle and surface electric field. When voltage of 2000 V is reversely applied to a diode having an N.sup.- -type region of impurity concentration ND of 5.times.10.sup.13 atoms/cm.sup.3 and a P.sup.+ -type region of a surface impurity concentration NS of 7.times.10.sup.17 atoms/cm.sup.3, the surface electric field is lowered in the so-called positive beveled structure in which the sectional area is reduced from a region of high impurity concentration toward a region of low impurity concentration, and hence influence by surface breakdown is small in an element of high reverse voltage blocking ability. However, the surface electric field is increased to easily cause surface breakdown in the so-called negative beveled structure in which the sectional area is increased from a region of high impurity concentration toward a region of low impurity concentration. Such surface breakdown easily takes place as the applied voltage is increased, to cause inconvenience in an element of high reverse voltage blocking ability. The bevel angle must be extremely increased in case of employing the negative beveled structure, whereas the effective chip area is decreased by such increase in bevel angle.
FIG. 8 shows relation between positive beveled structure and negative beveled structure. Referring to FIG. 8, a solid line 11 indicates the negative beveled structure and a dotted line 12 indicates the positive beveled structure. An inclination angle .GAMMA..sub.a corresponds to the negative beveled structure 11 and an inclination angle .theta..sub.b corresponds to the positive beveled structure 12 respectively.
The mesa grooves 2 are preferably of the positive beveled structure in order to prevent increase in surface electric field, as hereinabove described.
In the conventional semiconductor device, however, the mesa grooves 2 tend to be of the negative beveled structure since the same are formed by chemical etching. In general, equipotential surfaces 10 of the depletion layers 8 and 9 are bent in groove surface regions perpendicularly to the groove surfaces for obtaining charge balance. Therefore, if the mesa grooves 2 are finished in negative beveled structure, the width of the depletion layer is larger in the inner portion than at the groove surface portion when voltage is applied, leading to increase in surface electric field. Although the semiconductor device having such mesa grooves of the negative beveled structure is simple in manufacturing process since the same is formed by chemical etching, the same cannot be applied to an element of high reverse voltage blocking ability applied voltage of 2000 V or more, for example. Further, when deep mesa grooves are obtained by etching, the depth of mesa grooves is so varied. When the depth of mesa grooves is shallow, prescribed reverse voltage blocking ability cannot be attained by increase in negative bevel angle. When the depth of mesa grooves is deep, the thickness of the semiconductor wafer at mesa groove portion is reduced to easily break the semiconductor wafer.